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System & Infrastructure - Event Routing - nordic,nrf-dppic

nRF5340 DPPIC (distributed PPI controller)

DPPI controller with 32 channels and 6 channel groups. CHEN/CHENSET/CHENCLR writes (and CHG group enable/disable tasks) propagate immediately to the shared `DppiBus` channel-enable mask so publishes within the same tick are routed correctly; the event routing itself happens inside the bus, not via effects.

snapshottable

Events emitted

No peripheral-specific events. Structured activity (IRQs, DMA) surfaces through the shared event vocabulary.

Events accepted

No peripheral-specific input events. The peripheral is driven through MMIO register access.

Commands

This peripheral exposes no commands.

Snapshot fields

FieldTypeLabel
chenu32CHEN (channel enable)
chg0u32CHG[0] (channel group 0)
chg1u32CHG[1] (channel group 1)
chg2u32CHG[2] (channel group 2)
chg3u32CHG[3] (channel group 3)
chg4u32CHG[4] (channel group 4)
chg5u32CHG[5] (channel group 5)
state_jsonstrDPPIC State (JSON)

Read at runtime with emulator.peripheral_snapshot(name).

Boards using this peripheral