{ "boards": [ { "arch": "armv8m", "id": "nordic,nrf5340-dk-cpuapp", "name": "nRF5340-DK Application Core", "peripherals": [ { "base": 16711680, "compatible": "nordic,nrf-ficr", "name": "ficr", "slug": "nordic-nrf-ficr" }, { "base": 16744448, "compatible": "nordic,nrf-uicr", "name": "uicr", "slug": "nordic-nrf-uicr" }, { "base": 1073741824, "compatible": "nordic,nrf-dcnf", "name": "dcnf", "slug": "nordic-nrf-dcnf" }, { "base": 1073745920, "compatible": "nordic,nrf-cache", "name": "cache", "slug": "nordic-nrf-cache" }, { "base": 1073754112, "compatible": "nordic,nrf-spu", "name": "spu", "slug": "nordic-nrf-spu" }, { "base": 1073758208, "compatible": "nordic,nrf-oscillators", "name": "oscillators", "slug": "nordic-nrf-oscillators" }, { "base": 1073762304, "compatible": "nordic,nrf-clock", "name": "clock", "slug": "nordic-nrf-clock" }, { "base": 1073766400, "compatible": "nordic,nrf-ctrlap", "name": "ctrlap", "slug": "nordic-nrf-ctrlap" }, { "base": 1073774592, "compatible": "nordic,nrf-uarte", "name": "uarte0", "slug": "nordic-nrf-uarte" }, { "base": 1073778688, "compatible": "nordic,nrf-uarte", "name": "uarte1", "slug": "nordic-nrf-uarte" }, { "base": 1073782784, "compatible": "nordic,nrf-spim", "name": "spim4", "slug": "nordic-nrf-spim" }, { "base": 1073786880, "compatible": "nordic,nrf-uarte", "name": "uarte2", "slug": "nordic-nrf-uarte" }, { "base": 1073790976, "compatible": "nordic,nrf-uarte", "name": "uarte3", "slug": "nordic-nrf-uarte" }, { "base": 1073795072, "compatible": "nordic,nrf-gpiote", "name": "gpiote0", "slug": "nordic-nrf-gpiote" }, { "base": 1073799168, "compatible": "nordic,nrf-saadc", "name": "saadc", "slug": "nordic-nrf-saadc" }, { "base": 1073803264, "compatible": "nordic,nrf-timer", "name": "timer0", "slug": "nordic-nrf-timer" }, { "base": 1073807360, "compatible": "nordic,nrf-timer", "name": "timer1", "slug": "nordic-nrf-timer" }, { "base": 1073811456, "compatible": "nordic,nrf-timer", "name": "timer2", "slug": "nordic-nrf-timer" }, { "base": 1073823744, "compatible": "nordic,nrf-rtc", "name": "rtc0", "slug": "nordic-nrf-rtc" }, { "base": 1073827840, "compatible": "nordic,nrf-rtc", "name": "rtc1", "slug": "nordic-nrf-rtc" }, { "base": 1073836032, "compatible": "nordic,nrf-dppic", "name": "dppic", "slug": "nordic-nrf-dppic" }, { "base": 1073840128, "compatible": "nordic,nrf-wdt", "name": "wdt0", "slug": "nordic-nrf-wdt" }, { "base": 1073844224, "compatible": "nordic,nrf-wdt", "name": "wdt1", "slug": "nordic-nrf-wdt" }, { "base": 1073848320, "compatible": "nordic,nrf-comp", "name": "comp", "slug": "nordic-nrf-comp" }, { "base": 1073852416, "compatible": "nordic,nrf-egu", "name": "egu0", "slug": "nordic-nrf-egu" }, { "base": 1073856512, "compatible": "nordic,nrf-egu", "name": "egu1", "slug": "nordic-nrf-egu" }, { "base": 1073860608, "compatible": "nordic,nrf-egu", "name": "egu2", "slug": "nordic-nrf-egu" }, { "base": 1073864704, "compatible": "nordic,nrf-egu", "name": "egu3", "slug": "nordic-nrf-egu" }, { "base": 1073868800, "compatible": "nordic,nrf-egu", "name": "egu4", "slug": "nordic-nrf-egu" }, { "base": 1073872896, "compatible": "nordic,nrf-egu", "name": "egu5", "slug": "nordic-nrf-egu" }, { "base": 1073876992, "compatible": "nordic,nrf-pwm", "name": "pwm0", "slug": "nordic-nrf-pwm" }, { "base": 1073881088, "compatible": "nordic,nrf-pwm", "name": "pwm1", "slug": "nordic-nrf-pwm" }, { "base": 1073885184, "compatible": "nordic,nrf-pwm", "name": "pwm2", "slug": "nordic-nrf-pwm" }, { "base": 1073889280, "compatible": "nordic,nrf-pwm", "name": "pwm3", "slug": "nordic-nrf-pwm" }, { "base": 1073897472, "compatible": "nordic,nrf-pdm", "name": "pdm0", "slug": "nordic-nrf-pdm" }, { "base": 1073905664, "compatible": "nordic,nrf-i2s", "name": "i2s0", "slug": "nordic-nrf-i2s" }, { "base": 1073913856, "compatible": "nordic,nrf-ipc", "name": "ipc", "slug": "nordic-nrf-ipc" }, { "base": 1073917952, "compatible": "nordic,nrf-qspi", "name": "qspi", "slug": "nordic-nrf-qspi" }, { "base": 1073926144, "compatible": "nordic,nrf-nfct", "name": "nfct", "slug": "nordic-nrf-nfct" }, { "base": 1073934336, "compatible": "nordic,nrf-gpiote", "name": "gpiote1", "slug": "nordic-nrf-gpiote" }, { "base": 1073938432, "compatible": "nordic,nrf-mutex", "name": "mutex", "slug": "nordic-nrf-mutex" }, { "base": 1073950720, "compatible": "nordic,nrf-qdec", "name": "qdec0", "slug": "nordic-nrf-qdec" }, { "base": 1073954816, "compatible": "nordic,nrf-qdec", "name": "qdec1", "slug": "nordic-nrf-qdec" }, { "base": 1073963008, "compatible": "nordic,nrf-usbd", "name": "usbd", "slug": "nordic-nrf-usbd" }, { "base": 1073967104, "compatible": "nordic,nrf-usbreg", "name": "usbreg", "slug": "nordic-nrf-usbreg" }, { "base": 1073975296, "compatible": "nordic,nrf-kmu-nvmc", "name": "kmu", "slug": "nordic-nrf-kmu-nvmc" }, { "base": 1074270208, "compatible": "nordic,nrf-vmc", "name": "vmc", "slug": "nordic-nrf-vmc" }, { "base": 1082402048, "compatible": "nordic,nrf-gpio", "name": "gpio0", "slug": "nordic-nrf-gpio" }, { "base": 1082402816, "compatible": "nordic,nrf-gpio", "name": "gpio1", "slug": "nordic-nrf-gpio" }, { "base": 1082408960, "compatible": "nordic,nrf-cryptocell", "name": "cryptocell", "slug": "nordic-nrf-cryptocell" } ], "slug": "nordic-nrf5340-dk-cpuapp" } ], "generated": { "schema_version": 1, "tool": "extract-reference", "vemu_version": "0.1.0" }, "global_events": { "in": [ { "doc": "Game controller state for console boards.", "kind": "joypad", "payload_schema": { "properties": { "bits": { "description": "Packed button bitmask.", "format": "u32", "type": "integer" } }, "required": [ "bits" ], "type": "object" } }, { "doc": "Bytes from the host (terminal keystrokes) delivered to the guest UART RX line.", "kind": "uart.rx", "payload_schema": { "properties": { "bytes": { "description": "Received bytes.", "format": "bytes", "items": { "format": "u8", "type": "integer" }, "type": "array" } }, "required": [ "bytes" ], "type": "object" } } ], "out": [ { "doc": "Interleaved PCM audio samples were produced.", "kind": "audio.samples", "payload_schema": { "properties": { "sample_count": { "description": "Number of samples in the batch.", "format": "u64", "type": "integer" } }, "required": [ "sample_count" ], "type": "object" } }, { "doc": "A GPIO output pin changed level.", "kind": "gpio.change", "payload_schema": { "properties": { "level": { "description": "New logical level (`true` = high).", "type": "boolean" }, "pin": { "description": "Pin number within the port.", "format": "u32", "type": "integer" }, "port": { "description": "GPIO port index.", "format": "u32", "type": "integer" } }, "required": [ "port", "pin", "level" ], "type": "object" } }, { "doc": "An interrupt line was deasserted.", "kind": "irq.lower", "payload_schema": { "properties": { "line": { "description": "NVIC IRQ number (Cortex-M) or GIC SPI number (Cortex-A).", "format": "u32", "type": "integer" } }, "required": [ "line" ], "type": "object" } }, { "doc": "An interrupt line was asserted (pended).", "kind": "irq.raise", "payload_schema": { "properties": { "line": { "description": "NVIC IRQ number (Cortex-M) or GIC SPI number (Cortex-A).", "format": "u32", "type": "integer" } }, "required": [ "line" ], "type": "object" } }, { "doc": "Bytes transmitted by the guest on a UART/serial port.", "kind": "uart.tx", "payload_schema": { "properties": { "bytes": { "description": "Transmitted bytes.", "format": "bytes", "items": { "format": "u8", "type": "integer" }, "type": "array" }, "port": { "description": "Logical UART port index (0 = primary console).", "format": "u32", "type": "integer" } }, "required": [ "port", "bytes" ], "type": "object" } }, { "doc": "A completed display frame is available; fetch pixels via the framebuffer API.", "kind": "video.frame", "payload_schema": { "properties": { "height": { "description": "Frame height in pixels.", "format": "u32", "type": "integer" }, "width": { "description": "Frame width in pixels.", "format": "u32", "type": "integer" } }, "required": [ "width", "height" ], "type": "object" } } ] }, "peripherals": { "arm,pl011": { "caps": [], "class": { "group": "connectivity", "group_label": "Connectivity", "group_order": 1, "id": "serial", "label": "UART / Serial" }, "commands": [], "doc": "Behavioral PL011 UART model (also covers `ti,stellaris-uart`). TX bytes surface as `uart.tx` events; host bytes arrive as `uart.rx` inputs and are buffered in a small RX FIFO popped via `DR` reads. No baud timing - TX is always ready.", "effects": [ "uart_tx" ], "events_in": [], "events_out": [], "id": "arm,pl011", "inputs": [ "uart_rx" ], "name": "ARM PrimeCell PL011 UART", "slug": "arm-pl011", "snapshot_fields": [ { "id": "DR", "label": "Data Register", "type": "u32", "writable": false }, { "id": "FR", "label": "Flag Register", "type": "u32", "writable": false }, { "id": "IBRD", "label": "Integer Baud Rate", "type": "u32", "writable": false }, { "id": "FBRD", "label": "Fractional Baud Rate", "type": "u32", "writable": false }, { "id": "LCRH", "label": "Line Control Register", "type": "u32", "writable": false }, { "id": "CR", "label": "Control Register", "type": "u32", "writable": false } ] }, "nordic,nrf-cache": { "caps": [ "snapshottable" ], "class": { "group": "memory", "group_label": "Memory & Storage", "group_order": 8, "id": "cache", "label": "Cache" }, "commands": [], "doc": "Transparent no-op cache controller: READY always reads 1, TASKS_STARTERASE latches EVENTS_STARTED and EVENTS_DONE in the same write (instant erase), INTEN/INTENSET/INTENCLR gate the IRQ, and ENABLE/PROFILING are stored with no effect on memory access behaviour or timing.", "effects": [ "signal_pulse", "custom" ], "events_in": [], "events_out": [ { "doc": "Fires immediately after nrf.cache.erase_started: the emulated erase completes in the same write cycle, so EVENTS_DONE is set atomically.", "kind": "nrf.cache.erase_done", "payload_schema": { "properties": {}, "required": [], "type": "object" } }, { "doc": "Fires when TASKS_STARTERASE is written and the EVENTS_STARTED latch is set. In emulation the erase is instantaneous so EVENTS_DONE fires in the same write cycle.", "kind": "nrf.cache.erase_started", "payload_schema": { "properties": {}, "required": [], "type": "object" } } ], "id": "nordic,nrf-cache", "inputs": [], "name": "nRF5340 CACHE", "slug": "nordic-nrf-cache", "snapshot_fields": [ { "id": "state_json", "label": "CACHE State (JSON)", "type": "str", "writable": false }, { "id": "inten", "label": "INTEN", "type": "u32", "writable": false }, { "id": "enable", "label": "ENABLE", "type": "u32", "writable": false }, { "id": "profiling", "label": "PROFILING", "type": "u32", "writable": false }, { "id": "ev_started", "label": "EVENTS_STARTED", "type": "bool", "writable": false }, { "id": "ev_done", "label": "EVENTS_DONE", "type": "bool", "writable": false } ] }, "nordic,nrf-clock": { "caps": [ "snapshottable" ], "class": { "group": "system", "group_label": "System & Infrastructure", "group_order": 10, "id": "clock_control", "label": "Clock Control" }, "commands": [], "doc": "Combined model of the shared CLOCK, POWER, and RESET block. All clock start/stop tasks and LFRC calibration complete instantly: the matching `STARTED`/`DONE` event latches in the same write cycle (IRQ when enabled). GPREGRET, RESETREAS (W1C), and `NETWORK.FORCEOFF` are stored; DPPI subscribe/publish registers are stored but not acted on.", "effects": [ "signal_pulse" ], "events_in": [], "events_out": [], "id": "nordic,nrf-clock", "inputs": [], "name": "nRF5340 CLOCK/POWER/RESET", "slug": "nordic-nrf-clock", "snapshot_fields": [ { "id": "state_json", "label": "CLOCK/POWER/RESET State (JSON)", "type": "str", "writable": false }, { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "hfclkstat", "label": "HFCLKSTAT", "type": "u32", "writable": false }, { "id": "lfclkstat", "label": "LFCLKSTAT", "type": "u32", "writable": false }, { "id": "hfclk192mstat", "label": "HFCLK192MSTAT", "type": "u32", "writable": false }, { "id": "resetreas", "label": "RESETREAS", "type": "u32", "writable": false }, { "id": "network_forceoff", "label": "NETWORK.FORCEOFF", "type": "u32", "writable": false } ] }, "nordic,nrf-comp": { "caps": [], "class": { "group": "analog", "group_label": "Analog", "group_order": 3, "id": "comparator", "label": "Comparator" }, "commands": [], "doc": "Behavioral COMP model: `TASKS_START` fires `EVENTS_READY` (IRQ when enabled). `TASKS_SAMPLE` captures the comparator output. `TASKS_STOP` halts the comparator. SHORTS (READY_SAMPLE, READY_STOP, DOWN_STOP, UP_STOP, CROSS_STOP) and DPPI SUBSCRIBE/PUBLISH are supported. No real analog signal: RESULT always reads 0 (input below threshold); UP/DOWN/CROSS events never fire.", "effects": [ "signal_pulse", "custom" ], "events_in": [], "events_out": [ { "doc": "COMP peripheral is ready and output is valid (EVENTS_READY fired).", "kind": "nrf.comp.ready", "payload_schema": { "properties": { "result": { "description": "Comparator result at the time READY fired (0 = below threshold).", "format": "u32", "type": "integer" } }, "required": [ "result" ], "type": "object" } }, { "doc": "Comparator value was sampled by TASKS_SAMPLE.", "kind": "nrf.comp.sampled", "payload_schema": { "properties": { "result": { "description": "Comparator RESULT register value at sample time.", "format": "u32", "type": "integer" } }, "required": [ "result" ], "type": "object" } } ], "id": "nordic,nrf-comp", "inputs": [], "name": "nRF5340 COMP (comparator)", "slug": "nordic-nrf-comp", "snapshot_fields": [ { "id": "state_json", "label": "COMP State (JSON)", "type": "str", "writable": false }, { "id": "inten", "label": "INTEN", "type": "u32", "writable": false }, { "id": "ev_ready", "label": "EVENTS_READY", "type": "u32", "writable": false }, { "id": "ev_down", "label": "EVENTS_DOWN", "type": "u32", "writable": false }, { "id": "ev_up", "label": "EVENTS_UP", "type": "u32", "writable": false }, { "id": "ev_cross", "label": "EVENTS_CROSS", "type": "u32", "writable": false }, { "id": "enable", "label": "ENABLE", "type": "u32", "writable": false }, { "id": "running", "label": "Running", "type": "bool", "writable": false }, { "id": "shorts", "label": "SHORTS", "type": "u32", "writable": false } ] }, "nordic,nrf-cryptocell": { "caps": [], "class": { "group": "security", "group_label": "Security", "group_order": 7, "id": "crypto", "label": "Crypto Accelerator" }, "commands": [], "doc": "Software-fallback stub for the CC312 hardware crypto engine: the wrapper `ENABLE` register (reset value 0) and the `HOST_RGF` IRR/IMR/ICR registers are modelled, which is enough for PSA/TF-M to detect that CryptoCell is unavailable and fall back to Mbed TLS software crypto. The CC_RNG TRNG block at +0x1000 is modelled functionally (EHR entropy registers fed by a deterministic xorshift64 generator) so secure-world provisioning code that drives the TRNG register protocol directly (e.g. TF-M HUK/IAK generation) completes in VEMU. No other crypto operations are emulated.", "effects": [ "custom" ], "events_in": [], "events_out": [ { "doc": "Fires when the TRNG entropy health registers (EHR) are refreshed, either on a TRNG_RESET write or after RNG_SW_RESET.", "kind": "nrf.cryptocell.trng_refresh", "payload_schema": { "properties": { "prng_state": { "description": "Current xorshift64 PRNG state after the refresh (deterministic entropy source).", "format": "u64", "type": "integer" } }, "required": [ "prng_state" ], "type": "object" } } ], "id": "nordic,nrf-cryptocell", "inputs": [], "name": "nRF5340 CRYPTOCELL (ARM CryptoCell-312 wrapper)", "slug": "nordic-nrf-cryptocell", "snapshot_fields": [ { "id": "state_json", "label": "CryptoCell State (JSON)", "type": "str", "writable": false }, { "id": "cc_enable", "label": "CC ENABLE", "type": "u32", "writable": false }, { "id": "host_irr", "label": "HOST_RGF IRR (pending IRQs)", "type": "u32", "writable": false }, { "id": "host_imr", "label": "HOST_RGF IMR (IRQ mask)", "type": "u32", "writable": false }, { "id": "rng_imr", "label": "RNG IMR (RNG interrupt mask)", "type": "u32", "writable": false }, { "id": "trng_valid", "label": "TRNG_VALID (entropy ready)", "type": "u32", "writable": false }, { "id": "sample_cnt", "label": "SAMPLE_CNT (subsampling rate)", "type": "u32", "writable": false } ] }, "nordic,nrf-ctrlap": { "caps": [ "snapshottable" ], "class": { "group": "system", "group_label": "System & Infrastructure", "group_order": 10, "id": "debug", "label": "Debug & Trace" }, "commands": [], "doc": "Behavioral model of the nRF5340 CTRL-AP peripheral (CPU side, sec 8.10.7). The CPU-to-debugger mailbox is fully modeled: writing TXDATA emits a `nrf.ctrlap.mailbox_tx` event and sets TXSTATUS=DataPending; reading RXDATA auto-clears RXSTATUS. Protection LOCK/DISABLE/STATUS registers are stored and read back. All protection is disabled by default in emulation so the debugger always has full access.", "effects": [ "custom" ], "events_in": [], "events_out": [ { "doc": "Firmware wrote a value to APPROTECT.DISABLE or SECUREAPPROTECT.DISABLE, attempting to disable access port protection.", "kind": "nrf.ctrlap.approtect_disable", "payload_schema": { "properties": { "key": { "description": "The 32-bit key value written by firmware.", "format": "u32", "type": "integer" }, "secure": { "description": "True if the secure access port protection disable was written.", "type": "boolean" } }, "required": [ "secure", "key" ], "type": "object" } }, { "doc": "Firmware wrote data to the CTRLAP MAILBOX.TXDATA register, sending a message to the debugger. The payload carries the data value.", "kind": "nrf.ctrlap.mailbox_tx", "payload_schema": { "properties": { "data": { "description": "32-bit value written to MAILBOX.TXDATA by the CPU.", "format": "u32", "type": "integer" } }, "required": [ "data" ], "type": "object" } } ], "id": "nordic,nrf-ctrlap", "inputs": [], "name": "nRF5340 CTRLAP (control access port)", "slug": "nordic-nrf-ctrlap", "snapshot_fields": [ { "id": "state_json", "label": "CTRLAP State (JSON)", "type": "str", "writable": false }, { "id": "mailbox_rxdata", "label": "MAILBOX.RXDATA", "type": "u32", "writable": false }, { "id": "mailbox_rxstatus", "label": "MAILBOX.RXSTATUS", "type": "u32", "writable": false }, { "id": "mailbox_txdata", "label": "MAILBOX.TXDATA", "type": "u32", "writable": false }, { "id": "mailbox_txstatus", "label": "MAILBOX.TXSTATUS", "type": "u32", "writable": false }, { "id": "approtect_disable", "label": "APPROTECT.DISABLE", "type": "u32", "writable": false }, { "id": "secureapprotect_disable", "label": "SECUREAPPROTECT.DISABLE", "type": "u32", "writable": false }, { "id": "status", "label": "STATUS", "type": "u32", "writable": false } ] }, "nordic,nrf-dcnf": { "caps": [ "snapshottable" ], "class": { "group": "system", "group_label": "System & Infrastructure", "group_order": 10, "id": "sys_config", "label": "System Config" }, "commands": [], "doc": "Domain configuration block present on both application and network cores of the nRF5340. The read-only `CPUID` register reports the core identity (0 = application, 1 = network) so firmware can identify its own core. On the application core the EXTPERI[0], EXTRAM[0], and EXTCODE[0] PROTECT registers gate AHB multilayer interconnect (AMLI) access by the network core; on the network core those registers are not present and writes to them are silently ignored.", "effects": [], "events_in": [], "events_out": [], "id": "nordic,nrf-dcnf", "inputs": [], "name": "nRF5340 DCNF (domain configuration)", "slug": "nordic-nrf-dcnf", "snapshot_fields": [ { "id": "core_id", "label": "Core ID (CPUID)", "type": "u32", "writable": false }, { "id": "extperi0_protect", "label": "EXTPERI[0].PROTECT", "type": "u32", "writable": false }, { "id": "extram0_protect", "label": "EXTRAM[0].PROTECT", "type": "u32", "writable": false }, { "id": "extcode0_protect", "label": "EXTCODE[0].PROTECT", "type": "u32", "writable": false }, { "id": "state_json", "label": "DCNF State Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-dppic": { "caps": [ "snapshottable" ], "class": { "group": "system", "group_label": "System & Infrastructure", "group_order": 10, "id": "event_routing", "label": "Event Routing" }, "commands": [], "doc": "DPPI controller with 32 channels and 6 channel groups. CHEN/CHENSET/CHENCLR writes (and CHG group enable/disable tasks) propagate immediately to the shared `DppiBus` channel-enable mask so publishes within the same tick are routed correctly; the event routing itself happens inside the bus, not via effects.", "effects": [], "events_in": [], "events_out": [], "id": "nordic,nrf-dppic", "inputs": [], "name": "nRF5340 DPPIC (distributed PPI controller)", "slug": "nordic-nrf-dppic", "snapshot_fields": [ { "id": "chen", "label": "CHEN (channel enable)", "type": "u32", "writable": false }, { "id": "chg0", "label": "CHG[0] (channel group 0)", "type": "u32", "writable": false }, { "id": "chg1", "label": "CHG[1] (channel group 1)", "type": "u32", "writable": false }, { "id": "chg2", "label": "CHG[2] (channel group 2)", "type": "u32", "writable": false }, { "id": "chg3", "label": "CHG[3] (channel group 3)", "type": "u32", "writable": false }, { "id": "chg4", "label": "CHG[4] (channel group 4)", "type": "u32", "writable": false }, { "id": "chg5", "label": "CHG[5] (channel group 5)", "type": "u32", "writable": false }, { "id": "state_json", "label": "DPPIC State (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-egu": { "caps": [], "class": { "group": "system", "group_label": "System & Infrastructure", "group_order": 10, "id": "event_routing", "label": "Event Routing" }, "commands": [], "doc": "16-channel software event generator: `TASKS_TRIGGER[n]` (via MMIO or DPPI subscribe) latches `EVENTS_TRIGGERED[n]`, publishes to the DPPI bus when configured, and pulses the IRQ for channels enabled in `INTEN`.", "effects": [ "signal_pulse" ], "events_in": [], "events_out": [], "id": "nordic,nrf-egu", "inputs": [], "name": "nRF5340 EGU (event generator unit)", "slug": "nordic-nrf-egu", "snapshot_fields": [ { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "events_triggered", "label": "EVENTS_TRIGGERED bitmask", "type": "u32", "writable": false }, { "id": "state_json", "label": "EGU State Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-ficr": { "caps": [], "class": { "group": "memory", "group_label": "Memory & Storage", "group_order": 8, "id": "config_memory", "label": "Config / OTP Memory" }, "commands": [], "doc": "Read-only factory information block pre-populated with plausible nRF5340 or nRF9160 values (`INFO.PART`, `INFO.DEVICEID`, RAM/flash sizes, code page geometry). Writes are silently ignored; unimplemented fields read as `0xFFFFFFFF`.", "effects": [], "events_in": [], "events_out": [], "id": "nordic,nrf-ficr", "inputs": [], "name": "nRF5340/nRF9160 FICR (factory information configuration registers)", "slug": "nordic-nrf-ficr", "snapshot_fields": [ { "id": "configid", "label": "INFO.CONFIGID", "type": "u32", "writable": false }, { "id": "deviceid0", "label": "INFO.DEVICEID[0]", "type": "u32", "writable": false }, { "id": "deviceid1", "label": "INFO.DEVICEID[1]", "type": "u32", "writable": false }, { "id": "part", "label": "INFO.PART", "type": "u32", "writable": false }, { "id": "variant", "label": "INFO.VARIANT", "type": "u32", "writable": false }, { "id": "package", "label": "INFO.PACKAGE", "type": "u32", "writable": false }, { "id": "ram_kb", "label": "INFO.RAM (KiB)", "type": "u32", "writable": false }, { "id": "flash_kb", "label": "INFO.FLASH (KiB)", "type": "u32", "writable": false }, { "id": "codepagesize", "label": "INFO.CODEPAGESIZE (bytes)", "type": "u32", "writable": false }, { "id": "codesize", "label": "INFO.CODESIZE (pages)", "type": "u32", "writable": false }, { "id": "devicetype", "label": "INFO.DEVICETYPE", "type": "u32", "writable": false }, { "id": "state_json", "label": "FICR Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-gpio": { "caps": [], "class": { "group": "io", "group_label": "Digital I/O", "group_order": 5, "id": "gpio", "label": "GPIO" }, "commands": [], "doc": "32-pin GPIO port model: `OUT`/`OUTSET`/`OUTCLR`, `DIR` variants, `IN`, `LATCH` (W1C), `DETECTMODE` and per-pin `PIN_CNF` with SENSE-based DETECT. Output-pin changes emit `GpioChange` effects. Input edges driven via `GpioSet`/`GpioClear`/`GpioToggle` inputs update `IN` and `LATCH` and are forwarded to GPIOTE through the wiring-time edge callback.", "effects": [ "gpio_change" ], "events_in": [], "events_out": [], "id": "nordic,nrf-gpio", "inputs": [ "gpio_set", "gpio_clear", "gpio_toggle" ], "name": "nRF5340 GPIO port", "slug": "nordic-nrf-gpio", "snapshot_fields": null }, "nordic,nrf-gpiote": { "caps": [ "tickable" ], "class": { "group": "io", "group_label": "Digital I/O", "group_order": 5, "id": "gpio", "label": "GPIO" }, "commands": [], "doc": "8-channel GPIOTE model. Event-mode channels latch `EVENTS_IN[n]` on matching pin edges reported by the GPIO ports and latch `EVENTS_PORT` when a SENSE-configured pin reaches its active level; task-mode channels drive (`TASKS_SET`/`TASKS_CLR`) or toggle (`TASKS_OUT`) pins on the injected GPIO port instances. Enabled events pulse the IRQ signal.", "effects": [ "signal_pulse" ], "events_in": [], "events_out": [], "id": "nordic,nrf-gpiote", "inputs": [], "name": "nRF5340 GPIOTE (GPIO tasks and events)", "slug": "nordic-nrf-gpiote", "snapshot_fields": null }, "nordic,nrf-i2s": { "caps": [ "tickable", "ext_dma" ], "class": { "group": "audio", "group_label": "Audio", "group_order": 4, "id": "i2s", "label": "I2S" }, "commands": [], "doc": "Functional I2S model with no real audio interface: `TASKS_START` fires `TXPTRUPD`/`RXPTRUPD` immediately (single-buffer completion model, IRQ when enabled). TX data is consumed via EasyDMA and discarded; the RX buffer is filled with silence (zeros). `TASKS_STOP` latches `STOPPED`. DPPI SUBSCRIBE/PUBLISH registers are modelled for `TASKS_START`, `TASKS_STOP` and all four events.", "effects": [ "signal_pulse", "dma" ], "events_in": [], "events_out": [], "id": "nordic,nrf-i2s", "inputs": [], "name": "nRF5340 I2S (inter-IC sound)", "slug": "nordic-nrf-i2s", "snapshot_fields": [ { "id": "state_json", "label": "I2S State (JSON summary)", "type": "str", "writable": false }, { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "enable", "label": "ENABLE", "type": "u32", "writable": false }, { "id": "ev_rxptrupd", "label": "EVENTS_RXPTRUPD latch", "type": "u32", "writable": false }, { "id": "ev_stopped", "label": "EVENTS_STOPPED latch", "type": "u32", "writable": false }, { "id": "ev_txptrupd", "label": "EVENTS_TXPTRUPD latch", "type": "u32", "writable": false }, { "id": "ev_framestart", "label": "EVENTS_FRAMESTART latch", "type": "u32", "writable": false }, { "id": "config_mode", "label": "CONFIG.MODE", "type": "u32", "writable": false }, { "id": "config_mckfreq", "label": "CONFIG.MCKFREQ", "type": "u32", "writable": false }, { "id": "config_ratio", "label": "CONFIG.RATIO", "type": "u32", "writable": false }, { "id": "config_swidth", "label": "CONFIG.SWIDTH", "type": "u32", "writable": false }, { "id": "config_channels", "label": "CONFIG.CHANNELS", "type": "u32", "writable": false }, { "id": "rxd_ptr", "label": "RXD.PTR", "type": "u32", "writable": false }, { "id": "txd_ptr", "label": "TXD.PTR", "type": "u32", "writable": false }, { "id": "rxtxd_maxcnt", "label": "RXTXD.MAXCNT", "type": "u32", "writable": false } ] }, "nordic,nrf-ipc": { "caps": [], "class": { "group": "system", "group_label": "System & Infrastructure", "group_order": 10, "id": "mailbox", "label": "Mailbox / IPC" }, "commands": [], "doc": "16-channel IPC mailbox model. `TASKS_SEND[n]` latches `EVENTS_RECEIVE` for every channel enabled in `SEND_CNF[n]` (loopback) and accumulates an outgoing channel mask that the compose orchestrator delivers to the peer core's IPC each quantum. Latched events with their `INTEN` bit set pulse the IRQ signal.", "effects": [ "signal_pulse" ], "events_in": [], "events_out": [], "id": "nordic,nrf-ipc", "inputs": [], "name": "nRF5340 IPC (inter-processor communication)", "slug": "nordic-nrf-ipc", "snapshot_fields": null }, "nordic,nrf-kmu-nvmc": { "caps": [ "flash_erase", "snapshottable" ], "class": { "group": "security", "group_label": "Security", "group_order": 7, "id": "key_management", "label": "Key Management" }, "commands": [ { "doc": "Trigger a host-side `TASKS_PUSH` of the selected slot.", "name": "push_slot", "params": [ { "doc": "Key slot index (0-127).", "name": "slot", "schema": { "format": "u32", "type": "integer" } } ] }, { "doc": "Revoke a slot: clear its STATE permission bit and zeroize the key words.", "name": "revoke_slot", "params": [ { "doc": "Key slot index (0-127).", "name": "slot", "schema": { "format": "u32", "type": "integer" } } ] }, { "doc": "Write the four key words of a slot directly into UICR (host-side provisioning shortcut).", "name": "write_slot", "params": [ { "doc": "Key slot index (0-127).", "name": "slot", "schema": { "format": "u32", "type": "integer" } }, { "doc": "Key word 0.", "name": "k0", "schema": { "format": "u32", "type": "integer" } }, { "doc": "Key word 1.", "name": "k1", "schema": { "format": "u32", "type": "integer" } }, { "doc": "Key word 2.", "name": "k2", "schema": { "format": "u32", "type": "integer" } }, { "doc": "Key word 3.", "name": "k3", "schema": { "format": "u32", "type": "integer" } } ] } ], "doc": "Combined model of the shared 4 KiB KMU/NVMC block. KMU pushes and revokes the 128 UICR-backed key slots (zeroizing on revoke, as per the product specification); NVMC provides the flash write-enable gate, page erase, and ERASEALL.", "effects": [ "signal_pulse", "flash_erase", "custom" ], "events_in": [], "events_out": [ { "doc": "A KMU key slot was pushed to its destination address (`TASKS_PUSH`).", "kind": "nrf.kmu.slot_pushed", "payload_schema": { "properties": { "dest": { "description": "Destination address from the slot's DEST word.", "format": "u32", "type": "integer" }, "key": { "description": "The four 32-bit key words, or `null` when not readable.", "items": { "format": "u32", "type": "integer" }, "type": "array" }, "key_readable": { "description": "Whether the slot permits host-side key read-out.", "type": "boolean" }, "slot": { "description": "Key slot index (0-127).", "format": "u32", "type": "integer" } }, "required": [ "slot", "dest", "key_readable" ], "type": "object" } }, { "doc": "A KMU key slot was revoked: key words zeroized, STATE cleared.", "kind": "nrf.kmu.slot_revoked", "payload_schema": { "properties": { "slot": { "description": "Key slot index (0-127).", "format": "u32", "type": "integer" } }, "required": [ "slot" ], "type": "object" } } ], "id": "nordic,nrf-kmu-nvmc", "inputs": [], "name": "nRF5340 KMU + NVMC (key management + flash controller)", "slug": "nordic-nrf-kmu-nvmc", "snapshot_fields": [ { "id": "state_json", "label": "KMU Slot State (JSON)", "type": "str", "writable": false }, { "id": "kmu_info", "label": "KMU FSM Info (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-mutex": { "caps": [], "class": { "group": "system", "group_label": "System & Infrastructure", "group_order": 10, "id": "semaphore", "label": "Hardware Semaphore" }, "commands": [ { "doc": "Forcibly release a held mutex (fault injection). `index` is the mutex number 0-15.", "name": "release", "params": [ { "doc": "Mutex index to release (0-15).", "name": "index", "schema": { "format": "u32", "type": "integer" } } ] } ], "doc": "Hardware spinlock model with 16 `MUTEX[n]` registers implementing atomic test-and-set: a read returning 0 claims the mutex, a read returning 1 means it is already held, and writing 0 releases it, per nRF5340 PS sec 7.19.", "effects": [], "events_in": [], "events_out": [], "id": "nordic,nrf-mutex", "inputs": [], "name": "nRF5340 MUTEX (mutual exclusion)", "slug": "nordic-nrf-mutex", "snapshot_fields": [ { "id": "claimed_mask", "label": "Claimed mask (bitmask, bit n = mutex n held)", "type": "u32", "writable": false }, { "id": "state_json", "label": "Mutex State Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-nfct": { "caps": [], "class": { "group": "wireless", "group_label": "Wireless", "group_order": 2, "id": "nfc", "label": "NFC" }, "commands": [], "doc": "Behavioral NFCT model: state-machine tasks latch the matching events and pulse the IRQ when enabled. `TASKS_STARTTX` emits a `nrf.nfct.tx_frame` effect carrying TXD configuration. No real RF field; `FIELDPRESENT`, `NFCTAGSTATE`, and `SLEEPSTATE` always read 0. All config registers (PACKETPTR, MAXLEN, NFC-ID, SENSRES, ...) are plain R/W storage.", "effects": [ "signal_pulse", "custom" ], "events_in": [], "events_out": [ { "doc": "NFCT TASKS_STARTTX was triggered: a TX frame configuration was captured.", "kind": "nrf.nfct.tx_frame", "payload_schema": { "properties": { "packetptr": { "description": "PACKETPTR register value at the time of TX start.", "format": "u32", "type": "integer" }, "txd_amount": { "description": "TXD.AMOUNT register value (byte + bit count for TX frame).", "format": "u32", "type": "integer" }, "txd_frameconfig": { "description": "TXD.FRAMECONFIG register value.", "format": "u32", "type": "integer" } }, "required": [ "packetptr", "txd_amount", "txd_frameconfig" ], "type": "object" } } ], "id": "nordic,nrf-nfct", "inputs": [], "name": "nRF5340 NFCT (NFC tag interface)", "slug": "nordic-nrf-nfct", "snapshot_fields": [ { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "shorts", "label": "SHORTS", "type": "u32", "writable": false }, { "id": "packetptr", "label": "PACKETPTR", "type": "u32", "writable": false }, { "id": "txd_amount", "label": "TXD.AMOUNT", "type": "u32", "writable": false }, { "id": "rxd_amount", "label": "RXD.AMOUNT", "type": "u32", "writable": false }, { "id": "errorstatus", "label": "ERRORSTATUS", "type": "u32", "writable": false }, { "id": "state_json", "label": "NFCT State Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-oscillators": { "caps": [ "snapshottable" ], "class": { "group": "system", "group_label": "System & Infrastructure", "group_order": 10, "id": "clock_control", "label": "Clock Control" }, "commands": [], "doc": "Nordic nRF5340 OSCILLATORS peripheral (sec 4.12): three retained configuration registers - `XOSC32MCAPS` (HFXO internal capacitor trim), `XOSC32KI.BYPASS` (LFXO external-clock bypass), and `XOSC32KI.INTCAP` (LFXO internal load capacitor selection). No TASKS, EVENTS, or IRQ; all writes are stored as-is.", "effects": [], "events_in": [], "events_out": [], "id": "nordic,nrf-oscillators", "inputs": [], "name": "nRF5340 OSCILLATORS", "slug": "nordic-nrf-oscillators", "snapshot_fields": [ { "id": "state_json", "label": "OSCILLATORS State (JSON)", "type": "str", "writable": false }, { "id": "xosc32mcaps", "label": "XOSC32MCAPS", "type": "u32", "writable": false }, { "id": "xosc32ki_bypass", "label": "XOSC32KI.BYPASS", "type": "u32", "writable": false }, { "id": "xosc32ki_intcap", "label": "XOSC32KI.INTCAP", "type": "u32", "writable": false } ] }, "nordic,nrf-pdm": { "caps": [ "tickable" ], "class": { "group": "audio", "group_label": "Audio", "group_order": 4, "id": "dmic", "label": "Digital Microphone (PDM)" }, "commands": [], "doc": "Functional PDM model with no real microphone: `TASKS_START` latches `STARTED`, fills the EasyDMA sample buffer with silence (zeros), and latches `END` immediately; `TASKS_STOP` latches `STOPPED` (IRQ when enabled). Supports DPPI SUBSCRIBE/PUBLISH.", "effects": [ "signal_pulse", "dma", "custom" ], "events_in": [], "events_out": [ { "doc": "Fires when the PDM EasyDMA has written the last sample to RAM (EVENTS_END latched).", "kind": "nrf.pdm.end", "payload_schema": { "properties": {}, "required": [], "type": "object" } }, { "doc": "Fires when the PDM peripheral starts a transfer (EVENTS_STARTED latched).", "kind": "nrf.pdm.started", "payload_schema": { "properties": {}, "required": [], "type": "object" } }, { "doc": "Fires when the PDM peripheral stops (EVENTS_STOPPED latched).", "kind": "nrf.pdm.stopped", "payload_schema": { "properties": {}, "required": [], "type": "object" } } ], "id": "nordic,nrf-pdm", "inputs": [], "name": "nRF5340 PDM (pulse density modulation microphone)", "slug": "nordic-nrf-pdm", "snapshot_fields": [ { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "ev_started", "label": "EVENTS_STARTED latch", "type": "u32", "writable": false }, { "id": "ev_stopped", "label": "EVENTS_STOPPED latch", "type": "u32", "writable": false }, { "id": "ev_end", "label": "EVENTS_END latch", "type": "u32", "writable": false }, { "id": "enable", "label": "ENABLE register", "type": "u32", "writable": false }, { "id": "sample_ptr", "label": "SAMPLE.PTR (EasyDMA destination)", "type": "u32", "writable": false }, { "id": "sample_maxcnt", "label": "SAMPLE.MAXCNT (number of samples)", "type": "u32", "writable": false }, { "id": "state_json", "label": "PDM State Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-pwm": { "caps": [], "class": { "group": "io", "group_label": "Digital I/O", "group_order": 5, "id": "pwm", "label": "PWM" }, "commands": [], "doc": "Functional PWM model with no electrical output. `TASKS_SEQSTART[n]` consumes the sequence descriptor via an EasyDMA read and latches `SEQSTARTED`, `SEQEND`, `PWMPERIODEND`, and `LOOPSDONE` immediately (single-loop completion, IRQ when enabled); `TASKS_STOP` latches `STOPPED`. DPPI subscribe/publish is supported.", "effects": [ "signal_pulse", "dma" ], "events_in": [], "events_out": [], "id": "nordic,nrf-pwm", "inputs": [], "name": "nRF5340 PWM (pulse width modulation with EasyDMA)", "slug": "nordic-nrf-pwm", "snapshot_fields": [ { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "enable", "label": "ENABLE", "type": "u32", "writable": false }, { "id": "countertop", "label": "COUNTERTOP", "type": "u32", "writable": false }, { "id": "ev_stopped", "label": "EVENTS_STOPPED latch", "type": "u32", "writable": false }, { "id": "ev_seqstarted0", "label": "EVENTS_SEQSTARTED[0] latch", "type": "u32", "writable": false }, { "id": "ev_seqstarted1", "label": "EVENTS_SEQSTARTED[1] latch", "type": "u32", "writable": false }, { "id": "ev_seqend0", "label": "EVENTS_SEQEND[0] latch", "type": "u32", "writable": false }, { "id": "ev_seqend1", "label": "EVENTS_SEQEND[1] latch", "type": "u32", "writable": false }, { "id": "ev_pwmperiodend", "label": "EVENTS_PWMPERIODEND latch", "type": "u32", "writable": false }, { "id": "ev_loopsdone", "label": "EVENTS_LOOPSDONE latch", "type": "u32", "writable": false }, { "id": "state_json", "label": "PWM State Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-qdec": { "caps": [], "class": { "group": "io", "group_label": "Digital I/O", "group_order": 5, "id": "input", "label": "Input" }, "commands": [], "doc": "Functional QDEC model with no encoder connected: `TASKS_START` latches `SAMPLERDY` and `REPORTRDY` immediately, `TASKS_STOP` latches `STOPPED` (IRQ when enabled). `ACC`, `SAMPLE`, and the read-clear accumulator registers always read 0 (no movement). DPPI SUBSCRIBE/PUBLISH are fully wired. Two instances: QDEC0, QDEC1.", "effects": [ "signal_pulse" ], "events_in": [], "events_out": [], "id": "nordic,nrf-qdec", "inputs": [], "name": "nRF5340 QDEC (quadrature decoder)", "slug": "nordic-nrf-qdec", "snapshot_fields": [ { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "enable", "label": "ENABLE register", "type": "u32", "writable": false }, { "id": "running", "label": "Decoder running", "type": "bool", "writable": false }, { "id": "ev_samplerdy", "label": "EVENTS_SAMPLERDY latch", "type": "u32", "writable": false }, { "id": "ev_reportrdy", "label": "EVENTS_REPORTRDY latch", "type": "u32", "writable": false }, { "id": "ev_stopped", "label": "EVENTS_STOPPED latch", "type": "u32", "writable": false }, { "id": "state_json", "label": "QDEC State Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-qspi": { "caps": [ "tickable", "generic_dma" ], "class": { "group": "connectivity", "group_label": "Connectivity", "group_order": 1, "id": "spi", "label": "SPI" }, "commands": [], "doc": "Behavioral QSPI model with no external flash connected: every task (`ACTIVATE`, `DEACTIVATE`, erase tasks, `READ`, `WRITE`) latches `EVENTS_READY` immediately (IRQ when enabled). `TASKS_READ` fills the destination buffer with `0xFF` (erased flash) via EasyDMA; writes and erases are discarded. Custom events `nrf.qspi.transfer` and `nrf.qspi.erase` are emitted for host-side observation.", "effects": [ "signal_pulse", "dma", "custom" ], "events_in": [], "events_out": [ { "doc": "Emitted when a QSPI erase task completes (TASKS_ERASESTART, TASKS_ERASE128, TASKS_ERASE4, or TASKS_ERASE). Carries the flash pointer and the erase length in bytes.", "kind": "nrf.qspi.erase", "payload_schema": { "properties": { "len": { "description": "Number of bytes erased (0 when the length register is 0).", "format": "u32", "type": "integer" }, "ptr": { "description": "Flash address at which the erase began.", "format": "u32", "type": "integer" } }, "required": [ "ptr", "len" ], "type": "object" } }, { "doc": "Emitted when a QSPI read or write transfer completes (TASKS_READ or TASKS_WRITE). The `direction` field is `\"read\"` or `\"write\"`.", "kind": "nrf.qspi.transfer", "payload_schema": { "properties": { "direction": { "description": "Transfer direction: `\"read\"` or `\"write\"`.", "enum": [ "read", "write" ], "type": "string" }, "dst": { "description": "Destination address (SRAM address for reads, flash offset for writes).", "format": "u32", "type": "integer" }, "len": { "description": "Transfer length in bytes.", "format": "u32", "type": "integer" }, "src": { "description": "Source address (flash offset for reads, SRAM address for writes).", "format": "u32", "type": "integer" } }, "required": [ "direction", "src", "dst", "len" ], "type": "object" } } ], "id": "nordic,nrf-qspi", "inputs": [], "name": "nRF5340 QSPI (quad SPI external flash interface)", "slug": "nordic-nrf-qspi", "snapshot_fields": [ { "id": "state_json", "label": "QSPI State Summary (JSON)", "type": "str", "writable": false }, { "id": "inten", "label": "INTEN", "type": "u32", "writable": false }, { "id": "ev_ready", "label": "EVENTS_READY", "type": "u32", "writable": false }, { "id": "enable", "label": "ENABLE", "type": "u32", "writable": false }, { "id": "read_cnt", "label": "READ.CNT", "type": "u32", "writable": false }, { "id": "write_cnt", "label": "WRITE.CNT", "type": "u32", "writable": false }, { "id": "erase_ptr", "label": "ERASE.PTR", "type": "u32", "writable": false }, { "id": "erase_len", "label": "ERASE.LEN", "type": "u32", "writable": false } ] }, "nordic,nrf-rtc": { "caps": [ "tickable" ], "class": { "group": "timing", "group_label": "Timing", "group_order": 0, "id": "rtc", "label": "Real-Time Counter" }, "commands": [], "doc": "24-bit LFCLK (32.768 kHz) counter with prescaler, four compare channels, TICK/OVRFLW/COMPARE events, and DPPI subscribe/publish. Events latch unconditionally; `EVTEN` gates the DPPI publish path and `INTEN` gates the IRQ pulse, matching the product specification.", "effects": [ "signal_pulse" ], "events_in": [], "events_out": [], "id": "nordic,nrf-rtc", "inputs": [], "name": "nRF5340 RTC (real-time counter)", "slug": "nordic-nrf-rtc", "snapshot_fields": [ { "id": "state_json", "label": "RTC State Summary (JSON)", "type": "str", "writable": false }, { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "evten", "label": "EVTEN (event routing enable)", "type": "u32", "writable": false }, { "id": "counter", "label": "COUNTER (current 24-bit value)", "type": "u32", "writable": false }, { "id": "prescaler", "label": "PRESCALER (12-bit divider)", "type": "u32", "writable": false }, { "id": "running", "label": "Running (RTC is counting)", "type": "bool", "writable": false }, { "id": "ev_tick", "label": "EVENTS_TICK latch", "type": "u32", "writable": false }, { "id": "ev_ovrflw", "label": "EVENTS_OVRFLW latch", "type": "u32", "writable": false }, { "id": "ev_compare", "label": "EVENTS_COMPARE bitmask (bits 0-3)", "type": "u32", "writable": false } ] }, "nordic,nrf-saadc": { "caps": [ "tickable", "generic_dma" ], "class": { "group": "analog", "group_label": "Analog", "group_order": 3, "id": "adc", "label": "ADC" }, "commands": [], "doc": "Functional SAADC model with no analog front-end. `TASKS_SAMPLE` fills the EasyDMA result buffer with zero samples (0 V input) and latches `RESULTDONE`, `DONE`, and `END` immediately; `TASKS_START` latches `STARTED` and `TASKS_CALIBRATEOFFSET` completes instantly with `CALIBRATEDONE` (IRQ when enabled). DPPI subscribe/publish is supported. External samples can be injected via `nrf.saadc.inject_sample` Custom inputs.", "effects": [ "signal_pulse", "dma", "custom" ], "events_in": [ { "doc": "Inject an ADC sample value for a given channel index. The value will be written by the next TASKS_SAMPLE.", "kind": "nrf.saadc.inject_sample", "payload_schema": { "properties": { "channel": { "description": "Channel index (0-7).", "format": "u32", "type": "integer" }, "value": { "description": "16-bit signed ADC result (0 = 0 V; sign-extended to i16).", "format": "u32", "type": "integer" } }, "required": [ "channel", "value" ], "type": "object" } } ], "events_out": [ { "doc": "SAADC offset calibration completed (EVENTS_CALIBRATEDONE fired).", "kind": "nrf.saadc.calibratedone", "payload_schema": { "properties": {}, "required": [], "type": "object" } }, { "doc": "One SAADC sampling step completed (EVENTS_DONE fired).", "kind": "nrf.saadc.done", "payload_schema": { "properties": {}, "required": [], "type": "object" } }, { "doc": "EasyDMA result buffer is full; all requested samples written (EVENTS_END fired).", "kind": "nrf.saadc.end", "payload_schema": { "properties": { "sample_count": { "description": "Number of samples written to the result buffer.", "format": "u32", "type": "integer" } }, "required": [ "sample_count" ], "type": "object" } }, { "doc": "SAADC result data is available in the EasyDMA buffer (EVENTS_RESULTDONE fired).", "kind": "nrf.saadc.resultdone", "payload_schema": { "properties": {}, "required": [], "type": "object" } }, { "doc": "SAADC peripheral has started a sampling run (EVENTS_STARTED fired).", "kind": "nrf.saadc.started", "payload_schema": { "properties": {}, "required": [], "type": "object" } }, { "doc": "SAADC peripheral has stopped (EVENTS_STOPPED fired).", "kind": "nrf.saadc.stopped", "payload_schema": { "properties": {}, "required": [], "type": "object" } } ], "id": "nordic,nrf-saadc", "inputs": [ "custom" ], "name": "nRF5340 SAADC (successive-approximation ADC with EasyDMA)", "slug": "nordic-nrf-saadc", "snapshot_fields": [ { "id": "state_json", "label": "SAADC State (JSON)", "type": "str", "writable": false }, { "id": "inten", "label": "INTEN", "type": "u32", "writable": false }, { "id": "ev_started", "label": "EVENTS_STARTED", "type": "u32", "writable": false }, { "id": "ev_end", "label": "EVENTS_END", "type": "u32", "writable": false }, { "id": "ev_done", "label": "EVENTS_DONE", "type": "u32", "writable": false }, { "id": "ev_resultdone", "label": "EVENTS_RESULTDONE", "type": "u32", "writable": false }, { "id": "ev_calibratedone", "label": "EVENTS_CALIBRATEDONE", "type": "u32", "writable": false }, { "id": "ev_stopped", "label": "EVENTS_STOPPED", "type": "u32", "writable": false }, { "id": "enable", "label": "ENABLE", "type": "u32", "writable": false }, { "id": "running", "label": "Running", "type": "bool", "writable": false }, { "id": "shorts", "label": "SHORTS", "type": "u32", "writable": false }, { "id": "result_maxcnt", "label": "RESULT.MAXCNT", "type": "u32", "writable": false }, { "id": "result_amount", "label": "RESULT.AMOUNT", "type": "u32", "writable": false } ] }, "nordic,nrf-spim": { "caps": [], "class": { "group": "connectivity", "group_label": "Connectivity", "group_order": 1, "id": "spi", "label": "SPI" }, "commands": [], "doc": "Behavioral SPIM model with no real SPI bus: `TASKS_START` fires `STARTED` immediately, queues the TXD/RXD EasyDMA transfers (RX is filled with the `ORC` idle byte), and latches `ENDTX`, `ENDRX`, and `END` in the same write cycle (IRQ when enabled). DPPI subscribe/publish is supported; the `END_START` short does not auto-restart in emulation. A `nrf.spim.transfer` custom event is emitted on every transfer so the host can observe SPI traffic.", "effects": [ "signal_pulse", "dma", "custom" ], "events_in": [], "events_out": [ { "doc": "Fires when a SPIM EasyDMA transfer completes (END event). Carries the TX pointer, TX byte count, RX pointer, and RX byte count.", "kind": "nrf.spim.transfer", "payload_schema": { "properties": { "rxd_amount": { "description": "Number of RX bytes received (filled with ORC).", "format": "u32", "type": "integer" }, "rxd_ptr": { "description": "RX DMA destination pointer in guest SRAM.", "format": "u32", "type": "integer" }, "txd_amount": { "description": "Number of TX bytes transferred.", "format": "u32", "type": "integer" }, "txd_ptr": { "description": "TX DMA source pointer in guest SRAM.", "format": "u32", "type": "integer" } }, "required": [ "txd_ptr", "txd_amount", "rxd_ptr", "rxd_amount" ], "type": "object" } } ], "id": "nordic,nrf-spim", "inputs": [], "name": "nRF5340 SPIM (SPI master with EasyDMA)", "slug": "nordic-nrf-spim", "snapshot_fields": [ { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "ev_stopped", "label": "EVENTS_STOPPED latch", "type": "u32", "writable": false }, { "id": "ev_endrx", "label": "EVENTS_ENDRX latch", "type": "u32", "writable": false }, { "id": "ev_end", "label": "EVENTS_END latch", "type": "u32", "writable": false }, { "id": "ev_endtx", "label": "EVENTS_ENDTX latch", "type": "u32", "writable": false }, { "id": "ev_started", "label": "EVENTS_STARTED latch", "type": "u32", "writable": false }, { "id": "enable", "label": "ENABLE register", "type": "u32", "writable": false }, { "id": "frequency", "label": "FREQUENCY register", "type": "u32", "writable": false }, { "id": "config", "label": "CONFIG register (CPHA/CPOL/ORDER)", "type": "u32", "writable": false }, { "id": "orc", "label": "ORC (over-run character)", "type": "u32", "writable": false }, { "id": "txd_ptr", "label": "TXD.PTR", "type": "u32", "writable": false }, { "id": "txd_maxcnt", "label": "TXD.MAXCNT", "type": "u32", "writable": false }, { "id": "txd_amount", "label": "TXD.AMOUNT", "type": "u32", "writable": false }, { "id": "rxd_ptr", "label": "RXD.PTR", "type": "u32", "writable": false }, { "id": "rxd_maxcnt", "label": "RXD.MAXCNT", "type": "u32", "writable": false }, { "id": "rxd_amount", "label": "RXD.AMOUNT", "type": "u32", "writable": false }, { "id": "state_json", "label": "SPIM State Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-spu": { "caps": [], "class": { "group": "security", "group_label": "Security", "group_order": 7, "id": "access_control", "label": "Access Control / TrustZone" }, "commands": [ { "doc": "Inject an access-error event latch by name for fault-injection testing.", "name": "inject_event", "params": [ { "doc": "Event name: `ramaccerr`, `flashaccerr`, or `periphaccerr`.", "name": "event", "schema": { "enum": [ "ramaccerr", "flashaccerr", "periphaccerr" ], "type": "string" } } ] } ], "doc": "Secure/Non-Secure partitioning model: stores `FLASHREGION`, `RAMREGION`, `PERIPHID`, NSC and GPIOPORT permission registers consulted by the bus IDAU/security controller and the NVMC (`FLASHREGION[n].PERM.LOCK` gates write/erase). Access violations injected by the bus latch `EVENTS_RAMACCERR`/`FLASHACCERR`/`PERIPHACCERR` and pulse the IRQ when enabled.", "effects": [ "signal_pulse" ], "events_in": [], "events_out": [], "id": "nordic,nrf-spu", "inputs": [], "name": "nRF5340 SPU (system protection unit)", "slug": "nordic-nrf-spu", "snapshot_fields": null }, "nordic,nrf-timer": { "caps": [ "tickable" ], "class": { "group": "timing", "group_label": "Timing", "group_order": 0, "id": "timer", "label": "Timer" }, "commands": [], "doc": "Functional TIMER/counter model: 16 MHz base clock with prescaler, `BITMODE` widths, eight CC channels with capture and compare, `SHORTS` (COMPARE-CLEAR/STOP), `ONESHOTEN`, and DPPI subscribe/publish. COMPARE events latch unconditionally and pulse the IRQ when enabled in `INTEN`.", "effects": [ "signal_pulse" ], "events_in": [], "events_out": [], "id": "nordic,nrf-timer", "inputs": [], "name": "nRF5340 TIMER", "slug": "nordic-nrf-timer", "snapshot_fields": [ { "id": "state_json", "label": "TIMER State Summary (JSON)", "type": "str", "writable": false }, { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "running", "label": "Running (timer is counting)", "type": "bool", "writable": false }, { "id": "mode", "label": "MODE (0=Timer, 1=Counter, 2=LowPowerCounter)", "type": "u32", "writable": false }, { "id": "bitmode", "label": "BITMODE (0=16-bit, 1=8-bit, 2=24-bit, 3=32-bit)", "type": "u32", "writable": false }, { "id": "prescaler", "label": "PRESCALER (0-9; fTIMER = 16 MHz / 2^PRESCALER)", "type": "u32", "writable": false }, { "id": "counter", "label": "COUNTER (current masked value)", "type": "u32", "writable": false }, { "id": "shorts", "label": "SHORTS bitmask", "type": "u32", "writable": false }, { "id": "events_compare", "label": "EVENTS_COMPARE latch bitmask (bit i = channel i latched)", "type": "u32", "writable": false } ] }, "nordic,nrf-uarte": { "caps": [ "tickable", "ext_dma" ], "class": { "group": "connectivity", "group_label": "Connectivity", "group_order": 1, "id": "serial", "label": "UART / Serial" }, "commands": [], "doc": "UART with EasyDMA model. `TASKS_STARTTX` queues an EasyDMA read of `TXD.PTR`/`TXD.MAXCNT` from guest SRAM (console bytes are routed by the bus); the bus reports completion back, latching `EVENTS_ENDTX`. Received bytes pass through a 4-byte hardware FIFO into the active `RXD` buffer via DMA writes, with ENDRX/RXTO and SHORTS handling and level-sensitive IRQ re-evaluation on every event change.", "effects": [ "signal_pulse", "dma" ], "events_in": [ { "doc": "Bus-internal completion: an EasyDMA TX transfer finished.", "kind": "vemu.easydma.tx_complete", "payload_schema": { "properties": { "byte_count": { "description": "Bytes actually transferred.", "format": "u32", "type": "integer" }, "req_id": { "description": "Transfer id echoed from the DMA request.", "format": "u32", "type": "integer" } }, "required": [ "req_id", "byte_count" ], "type": "object" } } ], "events_out": [], "id": "nordic,nrf-uarte", "inputs": [ "uart_rx", "custom" ], "name": "nRF5340 UARTE (UART with EasyDMA)", "slug": "nordic-nrf-uarte", "snapshot_fields": [ { "id": "state_json", "label": "UARTE State Summary (JSON)", "type": "str", "writable": false }, { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "enable", "label": "ENABLE (0=disabled, 8=enabled)", "type": "u32", "writable": false }, { "id": "rx_active", "label": "RX active (EasyDMA RX transfer in progress)", "type": "bool", "writable": false }, { "id": "errorsrc", "label": "ERRORSRC (error source bitmask)", "type": "u32", "writable": false }, { "id": "baudrate", "label": "BAUDRATE register value", "type": "u32", "writable": false }, { "id": "shorts", "label": "SHORTS bitmask", "type": "u32", "writable": false }, { "id": "rxd_amount", "label": "RXD.AMOUNT (bytes received into current DMA buffer)", "type": "u32", "writable": false }, { "id": "txd_amount", "label": "TXD.AMOUNT (bytes sent in last DMA transfer)", "type": "u32", "writable": false } ] }, "nordic,nrf-uicr": { "caps": [ "snapshottable", "persistent_storage" ], "class": { "group": "memory", "group_label": "Memory & Storage", "group_order": 8, "id": "config_memory", "label": "Config / OTP Memory" }, "commands": [ { "doc": "Overwrite the UICR region with a raw image supplied as a hex string (host-side provisioning shortcut, e.g. the web UI 'Load UICR' button). Shorter images leave the tail unchanged.", "name": "load_image", "params": [ { "doc": "Raw UICR bytes, hex-encoded (max 4 KiB = 8192 hex chars).", "name": "data", "schema": { "type": "string" } } ] } ], "doc": "Non-volatile UICR flash model backed by a shared (optionally file-backed) byte store. Enforces the real NVMC WEN write-enable gate: stores with `NVMC.CONFIG != WEN` are dropped. Survives reset like silicon; only an NVMC ERASEALL clears it.", "effects": [ "custom" ], "events_in": [], "events_out": [ { "doc": "A UICR store was silently dropped because NVMC was not in WEN (write-enable) mode - mirrors real nRF5340 flash-controller behaviour.", "kind": "nrf.uicr.write_dropped", "payload_schema": { "properties": { "offset": { "description": "UICR register offset of the dropped write.", "format": "u32", "type": "integer" }, "reason": { "description": "Why the write was dropped.", "enum": [ "nvmc_wen_off" ], "type": "string" }, "val": { "description": "Value the firmware attempted to write.", "format": "u32", "type": "integer" } }, "required": [ "offset", "val", "reason" ], "type": "object" } }, { "doc": "A UICR write was committed to the non-volatile store (e.g. BL2 ROTPK provisioning into the OTP/CUSTOMER region).", "kind": "nrf.uicr.written", "payload_schema": { "properties": { "offset": { "description": "UICR register offset written.", "format": "u32", "type": "integer" }, "val": { "description": "Committed value.", "format": "u32", "type": "integer" } }, "required": [ "offset", "val" ], "type": "object" } } ], "id": "nordic,nrf-uicr", "inputs": [], "name": "nRF5340 UICR (user information configuration registers)", "slug": "nordic-nrf-uicr", "snapshot_fields": [ { "id": "approtect", "label": "APPROTECT", "type": "u32", "writable": false }, { "id": "secureapprotect", "label": "SECUREAPPROTECT", "type": "u32", "writable": false }, { "id": "state_json", "label": "UICR Region Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-usbd": { "caps": [], "class": { "group": "connectivity", "group_label": "Connectivity", "group_order": 1, "id": "usb", "label": "USB" }, "commands": [], "doc": "Behavioral USBD stub: writing ENABLE latches EVENTS_USBRESET (no VBUS - disconnected-bus semantics). All endpoint EasyDMA registers, EPINEN/EPOUTEN, EPSTALL, EPDATASTATUS, HALTED, and SETUP data registers are modelled as plain R/W storage. INTEN/INTENSET/INTENCLR gate IRQ assertion on every latched event.", "effects": [ "signal_pulse" ], "events_in": [], "events_out": [], "id": "nordic,nrf-usbd", "inputs": [], "name": "nRF5340 USBD (USB 2.0 full-speed device controller)", "slug": "nordic-nrf-usbd", "snapshot_fields": [ { "id": "state_json", "label": "USBD State (JSON summary)", "type": "str", "writable": false }, { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "enable", "label": "ENABLE register", "type": "u32", "writable": false }, { "id": "ev_usbreset", "label": "EVENTS_USBRESET latch", "type": "u32", "writable": false }, { "id": "ev_started", "label": "EVENTS_STARTED latch", "type": "u32", "writable": false }, { "id": "ev_ep0datadone", "label": "EVENTS_EP0DATADONE latch", "type": "u32", "writable": false }, { "id": "ev_epdata", "label": "EVENTS_EPDATA latch", "type": "u32", "writable": false }, { "id": "ev_sof", "label": "EVENTS_SOF latch", "type": "u32", "writable": false }, { "id": "ev_usbevent", "label": "EVENTS_USBEVENT latch", "type": "u32", "writable": false }, { "id": "epinen", "label": "EPINEN (endpoint IN enable bitmask)", "type": "u32", "writable": false }, { "id": "epouten", "label": "EPOUTEN (endpoint OUT enable bitmask)", "type": "u32", "writable": false }, { "id": "epstatus", "label": "EPSTATUS", "type": "u32", "writable": false }, { "id": "epdatastatus", "label": "EPDATASTATUS", "type": "u32", "writable": false }, { "id": "eventcause", "label": "EVENTCAUSE", "type": "u32", "writable": false }, { "id": "shorts", "label": "SHORTS bitmask", "type": "u32", "writable": false }, { "id": "usbaddr", "label": "USBADDR (assigned USB address)", "type": "u32", "writable": false } ] }, "nordic,nrf-usbreg": { "caps": [], "class": { "group": "connectivity", "group_label": "Connectivity", "group_order": 1, "id": "usb", "label": "USB" }, "commands": [], "doc": "Nordic Semiconductor USBREG peripheral (nRF5340). Models VBUS detection events (USBDETECTED, USBREMOVED) and USB regulator ready event (USBPWRRDY). USBREGSTATUS reflects the current VBUS and regulator state. Events latch unconditionally; INTEN gates the IRQ assertion only. No real VBUS modeled at reset: all events are 0 and USBREGSTATUS reads 0 (no VBUS, output not ready).", "effects": [ "signal_pulse" ], "events_in": [], "events_out": [], "id": "nordic,nrf-usbreg", "inputs": [], "name": "nRF5340 USBREG", "slug": "nordic-nrf-usbreg", "snapshot_fields": [ { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "usbregstatus", "label": "USBREGSTATUS (VBUSDETECT | OUTPUTRDY)", "type": "u32", "writable": false }, { "id": "ev_detected", "label": "EVENTS_USBDETECTED latch", "type": "u32", "writable": false }, { "id": "ev_removed", "label": "EVENTS_USBREMOVED latch", "type": "u32", "writable": false }, { "id": "ev_pwrrdy", "label": "EVENTS_USBPWRRDY latch", "type": "u32", "writable": false }, { "id": "state_json", "label": "USBREG State Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-vmc": { "caps": [], "class": { "group": "memory", "group_label": "Memory & Storage", "group_order": 8, "id": "memory_control", "label": "RAM Control" }, "commands": [], "doc": "RAM block power control model. `RAMBLOCK[n].POWER` registers (with POWERSET/POWERCLR set/clear semantics) are stored and read back, but RAM is always powered and retained in emulation - the programmed values have no behavioural effect on guest SRAM access.", "effects": [], "events_in": [], "events_out": [], "id": "nordic,nrf-vmc", "inputs": [], "name": "nRF5340 VMC (volatile memory controller)", "slug": "nordic-nrf-vmc", "snapshot_fields": [ { "id": "power0", "label": "RAMBLOCK[0].POWER", "type": "u32", "writable": false }, { "id": "power1", "label": "RAMBLOCK[1].POWER", "type": "u32", "writable": false }, { "id": "power2", "label": "RAMBLOCK[2].POWER", "type": "u32", "writable": false }, { "id": "power3", "label": "RAMBLOCK[3].POWER", "type": "u32", "writable": false }, { "id": "state_json", "label": "VMC State Summary (JSON)", "type": "str", "writable": false } ] }, "nordic,nrf-wdt": { "caps": [ "tickable" ], "class": { "group": "timing", "group_label": "Timing", "group_order": 0, "id": "watchdog", "label": "Watchdog" }, "commands": [], "doc": "Behavioral watchdog model: LFCLK-driven down-counter with `CRV` reload value, eight `RR[n]` reload slots gated by `RREN`, `CONFIG.STOPEN`-guarded stop requiring `TSEN` unlock, DPPI SUBSCRIBE/PUBLISH support, and INTEN/NMIEN gating. On timeout `EVENTS_TIMEOUT` latches and the IRQ/NMI signal is pulsed; on deliberate stop `EVENTS_STOPPED` latches. No system reset is performed by the model itself.", "effects": [ "signal_pulse" ], "events_in": [], "events_out": [], "id": "nordic,nrf-wdt", "inputs": [], "name": "nRF5340 WDT (watchdog timer)", "slug": "nordic-nrf-wdt", "snapshot_fields": [ { "id": "state_json", "label": "WDT State Summary (JSON)", "type": "str", "writable": false }, { "id": "inten", "label": "INTEN (interrupt enable mask)", "type": "u32", "writable": false }, { "id": "nmien", "label": "NMIEN (NMI enable mask)", "type": "u32", "writable": false }, { "id": "running", "label": "Running (WDT is counting)", "type": "bool", "writable": false }, { "id": "crv", "label": "CRV (counter reload value)", "type": "u32", "writable": false }, { "id": "rren", "label": "RREN (reload register enable bitmask)", "type": "u32", "writable": false }, { "id": "config", "label": "CONFIG (SLEEP/HALT/STOPEN)", "type": "u32", "writable": false }, { "id": "reqstatus", "label": "REQSTATUS (pending reload requests)", "type": "u32", "writable": false }, { "id": "ev_timeout", "label": "EVENTS_TIMEOUT latch", "type": "u32", "writable": false }, { "id": "ev_stopped", "label": "EVENTS_STOPPED latch", "type": "u32", "writable": false } ] } } }