System & Infrastructure - Clock Control - nordic,nrf-clock
nRF5340 CLOCK/POWER/RESET
Combined model of the shared CLOCK, POWER, and RESET block. All clock start/stop tasks and LFRC calibration complete instantly: the matching `STARTED`/`DONE` event latches in the same write cycle (IRQ when enabled). GPREGRET, RESETREAS (W1C), and `NETWORK.FORCEOFF` are stored; DPPI subscribe/publish registers are stored but not acted on.
snapshottableemits: signal_pulse
Events emitted
No peripheral-specific events. Structured activity (IRQs, DMA) surfaces through the shared event vocabulary.
Events accepted
No peripheral-specific input events. The peripheral is driven through MMIO register access.
Commands
This peripheral exposes no commands.
Snapshot fields
| Field | Type | Label |
|---|---|---|
| state_json | str | CLOCK/POWER/RESET State (JSON) |
| inten | u32 | INTEN (interrupt enable mask) |
| hfclkstat | u32 | HFCLKSTAT |
| lfclkstat | u32 | LFCLKSTAT |
| hfclk192mstat | u32 | HFCLK192MSTAT |
| resetreas | u32 | RESETREAS |
| network_forceoff | u32 | NETWORK.FORCEOFF |
Read at runtime with emulator.peripheral_snapshot(name).