Connectivity - UART / Serial - arm,pl011
ARM PrimeCell PL011 UART
Behavioral PL011 UART model (also covers `ti,stellaris-uart`). TX bytes surface as `uart.tx` events; host bytes arrive as `uart.rx` inputs and are buffered in a small RX FIFO popped via `DR` reads. No baud timing - TX is always ready.
Events emitted
No peripheral-specific events. Structured activity (IRQs, DMA) surfaces through the shared event vocabulary.
Events accepted
No peripheral-specific input events. The peripheral is driven through MMIO register access.
Commands
rxInject receive bytes into the UART RX FIFO from a hex string (e.g. "68656c6c6f" or "68 65 6c"; spaces and a 0x prefix are ignored). The guest then reads the bytes via DR.
| Param | Parsed as | Description |
|---|---|---|
| hex | string | Bytes to inject, as a hex string. |
All params travel as strings in the command JSON; the type shows how the peripheral parses them (0x/0b prefixes accepted for integers).
Snapshot fields
| Field | Type | Label |
|---|---|---|
| DR | u32 | Data Register |
| FR | u32 | Flag Register |
| IBRD | u32 | Integer Baud Rate |
| FBRD | u32 | Fractional Baud Rate |
| LCRH | u32 | Line Control Register |
| CR | u32 | Control Register |
Read at runtime with emulator.peripheral_snapshot(name).