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RP1 southbridge (Raspberry Pi 5 I/O over PCIe)

0 done - 0 partial - 10 to build

$0 / $56,2500% funded
Fund$56,250
$0 / $56,250 - 0%

Why it matters

Model the RP1 I/O controller that sits behind PCIe on Pi 5 and carries most external I/O (USB3, Ethernet, GPIO, SD, low-speed buses). Without it, a Pi 5 emulator is a stripped-down fake board.

What

Build out the 'RP1 southbridge (Raspberry Pi 5 I/O over PCIe)' capability area: 10 stories spanning 10 not-yet-built, 0 stubbed, 0 partial and 0 already-implemented (hardening) features.

Unblocks 1

Funding this also clears the way for the work below.

Stories in this epic (10)

Activity log

  1. Feature defined and added to the roadmap

  2. Feature defined and added to the roadmap

  3. Feature defined and added to the roadmap

  4. Feature defined and added to the roadmap

  5. Feature defined and added to the roadmap

  6. Feature defined and added to the roadmap

  7. Feature defined and added to the roadmap

  8. Feature defined and added to the roadmap

  9. Feature defined and added to the roadmap

  10. Feature defined and added to the roadmap

  11. Funding goal set to $2,750

  12. Funding goal set to $3,500

  13. Funding goal set to $5,250

  14. Funding goal set to $8,750

  15. Funding goal set to $4,500

  16. Funding goal set to $3,500

  17. Funding goal set to $7,000

  18. Funding goal set to $7,000

  19. Funding goal set to $5,250

  20. Funding goal set to $8,750

  21. Implementation status: Not implemented

  22. Implementation status: Not implemented

  23. Implementation status: Not implemented

  24. Implementation status: Not implemented

  25. Implementation status: Not implemented

  26. Implementation status: Not implemented

  27. Implementation status: Not implemented

  28. Implementation status: Not implemented

  29. Implementation status: Not implemented

  30. Implementation status: Not implemented