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PCIe & x86 interrupts

0 done - 1 partial - 2 to build

$0 / $27,7500% funded
Fund$27,750
$0 / $27,750 - 0%

Why it matters

Message-signaled interrupts and x86 interrupt controllers.

What

Build out the 'PCIe & x86 interrupts' capability area: 3 stories spanning 2 not-yet-built, 0 stubbed, 1 partial and 0 already-implemented (hardening) features.

Stories in this epic (3)

Activity log

  1. Feature defined and added to the roadmap

  2. Feature defined and added to the roadmap

  3. Feature defined and added to the roadmap

  4. Funding goal set to $4,000

  5. Funding goal set to $8,000

  6. Funding goal set to $15,750

  7. Implementation status: Partial

  8. Implementation status: Not implemented

  9. Implementation status: Not implemented