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Partial

MSI / MSI-X

Priority 2 - Interrupt & Exception Controllers

$0 / $4,0000% funded
Fund$4,000
$0 / $4,000 - 0%
As a RTOS developer, I want vemu to finish its MSI / MSI-X model, so that I can depend on pCIe devices for production firmware, not just the common path.

Why it matters

PCIe devices

Summary

PCIe message interrupts

Scope of work

Partially modeled. Complete the missing mechanics of MSI / MSI-X. What it is: PCIe message interrupts. Why it matters: PCIe devices.

Current state

Status: Partially implemented. Notes / evidence: MSI-X capability decode (vemu-pcie/config.rs) + MSI doorbell egress (host.rs raise_msi) exist; no interrupt-controller receiver translates the doorbell into a delivered IRQ yet.

Blocked by 1

Fund these first - this work can't be completed until they ship.

Unblocks 5

Funding this also clears the way for the work below.

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $4,000

  3. Implementation status: Partial