System interconnect (PCIe)
0 done - 1 partial - 0 to build
$0 / $6,2500% funded
$0 / $6,250 - 0%
Why it matters
The PCIe root complex that attaches high-speed devices.
What
Build out the 'System interconnect (PCIe)' capability area: 1 stories spanning 0 not-yet-built, 0 stubbed, 1 partial and 0 already-implemented (hardening) features.
Stories in this epic (1)
Activity log
Feature defined and added to the roadmap
Funding goal set to $6,250
Implementation status: Partial