← Back to roadmap
Not implemented

Xtensa (ESP32), ARC, Tensilica, Nios II

Priority 1 - CPU Architectures & Execution Engines / 1.7 Missing architecture families (none implemented)

$0 / $61,5000% funded
Fund$61,500
$0 / $61,500 - 0%
As a firmware developer, I want vemu to finish its Xtensa (ESP32), ARC, Tensilica, Nios II model, so that I can depend on wi-Fi MCUs / configurable cores for production firmware, not just the common path.

Why it matters

Wi-Fi MCUs / configurable cores

Summary

Xtensa (ESP32), ARC, Tensilica, Nios II

Scope of work

Not present today. Deliver a behavioral model of Xtensa (ESP32), ARC, Tensilica, Nios II. Why it matters: Wi-Fi MCUs / configurable cores.

Current state

Status: Not implemented.

Blocked by 1

Fund these first - this work can't be completed until they ship.

  • Done

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $61,500

  3. Implementation status: Not implemented