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Stub

TPIU / SWO

Priority 3 - Debug, Trace & Instrumentation Hardware / 3.3 Trace IP (on-chip) & host trace sinks

$0 / $3,0000% funded
Fund$3,000
$0 / $3,000 - 0%
As a firmware debugger, I want vemu to finish its TPIU / SWO model, so that I can depend on external trace capture for production firmware, not just the common path.

Why it matters

External trace capture

Summary

Trace output pin

Scope of work

Currently a register-only stub. Replace it with a working model of TPIU / SWO that actually exhibits the hardware behavior. What it is: Trace output pin. Why it matters: External trace capture.

Current state

Status: Stub only (registers, no behavior). Notes / evidence: Entry only.

Blocked by 1

Fund these first - this work can't be completed until they ship.

  • Done

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $3,000

  3. Implementation status: Stub