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Not implemented

TCM / scratchpad (ITCM/DTCM)

Priority 0 - Memory System

$0 / $9,7500% funded
Fund$9,750
$0 / $9,750 - 0%
As a firmware developer, I want vemu to finish its TCM / scratchpad (ITCM/DTCM) model, so that I can depend on RT determinism, ISR latency for production firmware, not just the common path.

Why it matters

RT determinism, ISR latency

Summary

Tightly-coupled fast memory regions

Scope of work

Not present today. Deliver a behavioral model of TCM / scratchpad (ITCM/DTCM). What it is: Tightly-coupled fast memory regions. Why it matters: RT determinism, ISR latency.

Current state

Status: Not implemented. Notes / evidence: Functionally just RAM.

Blocked by 1

Fund these first - this work can't be completed until they ship.

  • Done

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $9,750

  3. Implementation status: Not implemented