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Implemented

SVD parse - > codegen - > peripheral map

Priority 3 - Debug, Trace & Instrumentation Hardware / 3.3 Trace IP (on-chip) & host trace sinks

$1,500 / $1,500fully funded
Done$1,500 / $1,500 - 100%
As a firmware debugger, I want vemu's SVD parse - > codegen - > peripheral map to stay accurate, tested, and documented, so that I can keep depending on rapid SoC bring-up.

Why it matters

Rapid SoC bring-up

Summary

Generate device models from SVD

Scope of work

Already implemented. Harden, broaden coverage, add tests and documentation for SVD parse - > codegen - > peripheral map. What it is: Generate device models from SVD. Why it matters: Rapid SoC bring-up.

Current state

Status: Fully implemented. Notes / evidence: vemu-svd, vemu-svd-gen.

Unblocks 2

Funding this also clears the way for the work below.

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $1,500

  3. Implementation status: Implemented

  4. Delivered - counted as fully funded