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Not implemented

RVV 1.0 ratified vector

Priority 1 - CPU Architectures & Execution Engines / 1.7 RISC-V ISA

$0 / $14,0000% funded
Fund$14,000
$0 / $14,000 - 0%
As a firmware developer, I want vemu to finish its RVV 1.0 ratified vector model, so that I can depend on ratified-vector software for production firmware, not just the common path.

Why it matters

ratified-vector software

Summary

Ratified RVV 1.0 vector ISA

Scope of work

Not present today. Deliver a behavioral model of RVV 1.0 ratified vector. Why it matters: ratified-vector software.

Current state

Status: Not implemented.

Blocked by 1

Fund these first - this work can't be completed until they ship.

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $14,000

  3. Implementation status: Not implemented