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Not implemented

PMU performance counters + IRQ

Priority 1 - CPU Architectures & Execution Engines / 1.3 AArch64 (A64) & Cortex-A 64-bit

$0 / $8,0000% funded
Fund$8,000
$0 / $8,000 - 0%
As a firmware developer, I want vemu to finish its PMU performance counters + IRQ model, so that I can depend on profiling firmware for production firmware, not just the common path.

Why it matters

Profiling firmware

Summary

Cycle/event counters

Scope of work

Not present today. Deliver a behavioral model of PMU performance counters + IRQ. What it is: Cycle/event counters. Why it matters: Profiling firmware.

Current state

Status: Not implemented. Notes / evidence: PMUVer=0 in ID_AA64DFR0; PMU/debug regs RAZ/WI so OS probing does not fault, but nothing counts; no PMUIRQ.

Blocked by 2

Fund these first - this work can't be completed until they ship.

  • Done
  • Done

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $8,000

  3. Implementation status: Not implemented