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Not implemented

LPI / ITS

Priority 2 - Interrupt & Exception Controllers

$0 / $12,7500% funded
Fund$12,750
$0 / $12,750 - 0%
As a RTOS developer, I want vemu to finish its LPI / ITS model, so that I can depend on pCIe/MSI on ARM for production firmware, not just the common path.

Why it matters

PCIe/MSI on ARM

Summary

Message-signaled interrupts (ARM)

Scope of work

Not present today. Deliver a behavioral model of LPI / ITS. What it is: Message-signaled interrupts (ARM). Why it matters: PCIe/MSI on ARM.

Current state

Status: Not implemented. Notes / evidence: No ITS command queue / LPI tables / GITS_TRANSLATER receiver; the PCIe host (vemu-pcie) does emit MSI doorbell writes a future ITS would consume.

Blocked by 2

Fund these first - this work can't be completed until they ship.

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $12,750

  3. Implementation status: Not implemented