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Partial

Hardware crypto engine (AES/SHA)

Priority 4 - Hardware Accelerators

$0 / $9,7500% funded
Fund$9,750
$0 / $9,750 - 0%
As an edge-AI / multimedia developer, I want vemu to finish its Hardware crypto engine (AES/SHA) model, so that I can depend on secure boot / TLS offload for production firmware, not just the common path.

Why it matters

Secure boot / TLS offload

Summary

Symmetric crypto accelerator

Scope of work

Partially modeled. Complete the missing mechanics of Hardware crypto engine (AES/SHA). What it is: Symmetric crypto accelerator. Why it matters: Secure boot / TLS offload.

Current state

Status: Partially implemented. Notes / evidence: RK AES-ECB + SHA-224/256 full (real aes/sha2), Nordic AES-ECB full; STM32 AES is an XOR placeholder; Nordic CCM pass-through; PKA/ECC register-only.

Blocked by 2

Fund these first - this work can't be completed until they ship.

  • Done
  • Done

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $9,750

  3. Implementation status: Partial