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Partial

Guest cycle counter

Priority 0 - Core Emulator Infrastructure / 0.1 Execution core: time, scheduling, determinism

$0 / $3,5000% funded
Fund$3,500
$0 / $3,500 - 0%
As an emulator integrator, I want vemu to finish its Guest cycle counter model, so that I can depend on all timing derives from it for production firmware, not just the common path.

Why it matters

All timing derives from it

Summary

Master cycle/time base mirrored to the bus

Scope of work

Partially modeled. Complete the missing mechanics of Guest cycle counter. What it is: Master cycle/time base mirrored to the bus. Why it matters: All timing derives from it.

Current state

Status: Partially implemented. Notes / evidence: ~1 cycle/instruction - a counter, not cycle-accurate.

Blocked by 2

Fund these first - this work can't be completed until they ship.

  • Done
  • Done
Unblocks 1

Funding this also clears the way for the work below.

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $3,500

  3. Implementation status: Partial