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Implemented

GICv2 (distributor + CPU iface)

Priority 2 - Interrupt & Exception Controllers

$1,500 / $1,500fully funded
Done$1,500 / $1,500 - 100%
As a RTOS developer, I want vemu's GICv2 (distributor + CPU iface) to stay accurate, tested, and documented, so that I can keep depending on cortex-A7/A9 Linux.

Why it matters

Cortex-A7/A9 Linux

Summary

ARMv7-A interrupt controller

Scope of work

Already implemented. Harden, broaden coverage, add tests and documentation for GICv2 (distributor + CPU iface). What it is: ARMv7-A interrupt controller. Why it matters: Cortex-A7/A9 Linux.

Current state

Status: Fully implemented. Notes / evidence: vemu-arch-armv7a/src/gic.rs.

Blocked by 2

Fund these first - this work can't be completed until they ship.

  • Done
  • Done
Unblocks 6

Funding this also clears the way for the work below.

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $1,500

  3. Implementation status: Implemented

  4. Delivered - counted as fully funded