Implemented
Exception levels EL0-EL3, routing, ERET
Priority 1 - CPU Architectures & Execution Engines / 1.3 AArch64 (A64) & Cortex-A 64-bit
$1,500 / $1,500fully funded
Done$1,500 / $1,500 - 100%
As a firmware developer, I want vemu's Exception levels EL0-EL3, routing, ERET to stay accurate, tested, and documented, so that I can keep depending on secure/hyp boot.
Why it matters
Secure/hyp boot
Summary
Privilege model
Scope of work
Already implemented. Harden, broaden coverage, add tests and documentation for Exception levels EL0-EL3, routing, ERET. What it is: Privilege model. Why it matters: Secure/hyp boot.
Current state
Status: Fully implemented. Notes / evidence: exception.rs, pstate.rs.
Blocked by 1
Fund these first - this work can't be completed until they ship.
- Done
Activity log
Feature defined and added to the roadmap
Funding goal set to $1,500
Implementation status: Implemented
Delivered - counted as fully funded