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Stub

ECC memory

Priority 0 - Memory System

$0 / $6,7500% funded
Fund$6,750
$0 / $6,750 - 0%
As a firmware developer, I want vemu to finish its ECC memory model, so that I can depend on RAS / safety testing for production firmware, not just the common path.

Why it matters

RAS / safety testing

Summary

Single/double-bit error inject & detect

Scope of work

Currently a register-only stub. Replace it with a working model of ECC memory that actually exhibits the hardware behavior. What it is: Single/double-bit error inject & detect. Why it matters: RAS / safety testing.

Current state

Status: Stub only (registers, no behavior). Notes / evidence: Plain R/W regs; no error injection.

Blocked by 1

Fund these first - this work can't be completed until they ship.

  • Done

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $6,750

  3. Implementation status: Stub