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Partial

DWARF symbolization

Priority 3 - Debug, Trace & Instrumentation Hardware / 3.3 Trace IP (on-chip) & host trace sinks

$0 / $4,0000% funded
Fund$4,000
$0 / $4,000 - 0%
As a firmware debugger, I want vemu to finish its DWARF symbolization model, so that I can depend on readable traces for production firmware, not just the common path.

Why it matters

Readable traces

Summary

Address - > function/line

Scope of work

Partially modeled. Complete the missing mechanics of DWARF symbolization. What it is: Address - > function/line. Why it matters: Readable traces.

Current state

Status: Partially implemented. Notes / evidence: Parser full; sink enrichment is TODO.

Blocked by 1

Fund these first - this work can't be completed until they ship.

  • Done

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $4,000

  3. Implementation status: Partial