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Implemented

DMA controller

Priority 2 - Microcontroller & SoC Peripherals / 2.4 Data movement (DMA)

$2,000 / $2,000fully funded
Done$2,000 / $2,000 - 100%
As a device-driver developer, I want vemu's DMA controller to stay accurate, tested, and documented, so that I can keep depending on offload CPU.

Why it matters

Offload CPU

Summary

Memory/peripheral transfers + TC IRQ

Scope of work

Already implemented. Harden, broaden coverage, add tests and documentation for DMA controller. What it is: Memory/peripheral transfers + TC IRQ. Why it matters: Offload CPU.

Current state

Status: Fully implemented. Notes / evidence: Full on Nordic EasyDMA (cycle-accurate, live bus); STM32 GPDMA does a real transfer + TC IRQ but REQSEL trigger is a no-op; RK PL330 transfers on a private RAM copy, not the live bus.

Blocked by 2

Fund these first - this work can't be completed until they ship.

Unblocks 34

Funding this also clears the way for the work below.

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $2,000

  3. Implementation status: Implemented

  4. Delivered - counted as fully funded