← Back to roadmap
Implemented

ARM NVIC (nested, priority, preemption, tail-chaining)

Priority 2 - Interrupt & Exception Controllers

$1,500 / $1,500fully funded
Done$1,500 / $1,500 - 100%
As a RTOS developer, I want vemu's ARM NVIC (nested, priority, preemption, tail-chaining) to stay accurate, tested, and documented, so that I can keep depending on every Cortex-M.

Why it matters

Every Cortex-M

Summary

M-profile interrupt controller

Scope of work

Already implemented. Harden, broaden coverage, add tests and documentation for ARM NVIC (nested, priority, preemption, tail-chaining). What it is: M-profile interrupt controller. Why it matters: Every Cortex-M.

Current state

Status: Fully implemented. Notes / evidence: vemu-arch-arm-m/src/nvic.rs.

Blocked by 2

Fund these first - this work can't be completed until they ship.

  • Done
  • Done
Unblocks 11

Funding this also clears the way for the work below.

  • Done
  • Fund$6,750
  • Done
  • Fund$4,000
  • Done

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $1,500

  3. Implementation status: Implemented

  4. Delivered - counted as fully funded