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Implemented

ADIv5 DP + MEM-AP

Priority 3 - Debug, Trace & Instrumentation Hardware / 3.1 Debug transport & probe protocols

$1,500 / $1,500fully funded
Done$1,500 / $1,500 - 100%
As a firmware debugger, I want vemu's ADIv5 DP + MEM-AP to stay accurate, tested, and documented, so that I can keep depending on openOCD/pyOCD bridge.

Why it matters

OpenOCD/pyOCD bridge

Summary

Access-port memory access

Scope of work

Already implemented. Harden, broaden coverage, add tests and documentation for ADIv5 DP + MEM-AP. What it is: Access-port memory access. Why it matters: OpenOCD/pyOCD bridge.

Current state

Status: Fully implemented. Notes / evidence: adiv5.rs.

Blocked by 2

Fund these first - this work can't be completed until they ship.

  • Done
  • Fund$4,000
Unblocks 2

Funding this also clears the way for the work below.

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $1,500

  3. Implementation status: Implemented

  4. Delivered - counted as fully funded