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Implemented

A64 Advanced SIMD & scalar FP (ASIMD/FP)

Priority 1 - CPU Architectures & Execution Engines / 1.3 AArch64 (A64) & Cortex-A 64-bit

$1,500 / $1,500fully funded
Done$1,500 / $1,500 - 100%
As a firmware developer, I want vemu's A64 Advanced SIMD & scalar FP to stay accurate and tested, so that I can keep relying on ARMv8-A code that uses NEON/FP everywhere (memcpy, math, codecs).

Why it matters

ARMv8-A user/kernel code pervasively uses A64 SIMD/FP (memcpy, math, codecs)

Summary

Scalar + 128-bit NEON/FP, FP-access trap via CPACR_EL1

Scope of work

Already implemented. Harden, broaden coverage, add tests and documentation for A64 Advanced SIMD & scalar FP (ASIMD/FP). What it is: Scalar + 128-bit NEON/FP, FP-access trap via CPACR_EL1. Why it matters: ARMv8-A user/kernel code pervasively uses A64 SIMD/FP (memcpy, math, codecs).

Current state

Status: Fully implemented. Notes / evidence: vemu-arch-aarch64/src/decode/simdfp/ (scalar.rs, vector.rs); distinct from the AArch32 NEON in sec 1.4.

Blocked by 1

Fund these first - this work can't be completed until they ship.

  • Done
Unblocks 2

Funding this also clears the way for the work below.

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $1,500

  3. Implementation status: Implemented

  4. Delivered - counted as fully funded