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Partial

A32 (ARM) integer interpreter

Priority 1 - CPU Architectures & Execution Engines / 1.4 AArch32 (A32 + T32), NEON, VFP

$0 / $4,0000% funded
Fund$4,000
$0 / $4,000 - 0%
As a firmware developer, I want vemu to finish its A32 (ARM) integer interpreter model, so that I can depend on legacy ARM for production firmware, not just the common path.

Why it matters

Legacy ARM

Summary

DP/mul/ldst/LDM-STM/LDREX/CP15

Scope of work

Partially modeled. Complete the missing mechanics of A32 (ARM) integer interpreter. What it is: DP/mul/ldst/LDM-STM/LDREX/CP15. Why it matters: Legacy ARM.

Current state

Status: Partially implemented. Notes / evidence: parallel add/sub silently NOP instead of UNDEF.

Blocked by 1

Fund these first - this work can't be completed until they ship.

  • Done
Unblocks 6

Funding this also clears the way for the work below.

Activity log

  1. Feature defined and added to the roadmap

  2. Funding goal set to $4,000

  3. Implementation status: Partial